<?xml version="1.0" encoding="UTF-8"?>
<system name="DE0_Nano_SOPC">
 <parameter name="bonusData"><![CDATA[bonusData 
{
   element DE0_Nano_SOPC
   {
   }
   element adc_spi_read
   {
      datum _sortIndex
      {
         value = "18";
         type = "int";
      }
   }
   element altpll_sys
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
   }
   element jtag_uart.avalon_jtag_slave
   {
      datum baseAddress
      {
         value = "100667408";
         type = "long";
      }
   }
   element altpll_sys.c0
   {
      datum _clockDomain
      {
         value = "altpll_sys";
         type = "String";
      }
   }
   element altpll_sys.c1
   {
      datum _clockDomain
      {
         value = "altpll_sdram";
         type = "String";
      }
   }
   element altpll_sys.c2
   {
      datum _clockDomain
      {
         value = "altpll_io";
         type = "String";
      }
   }
   element altpll_sys.c4
   {
      datum _clockDomain
      {
         value = "altpll_adc";
         type = "String";
      }
   }
   element clk_50
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
   }
   element clock_crossing_io
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element clock_crossing_io2
   {
      datum _sortIndex
      {
         value = "13";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element sysid.control_slave
   {
      datum baseAddress
      {
         value = "112";
         type = "long";
      }
   }
   element cpu
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element epcs
   {
      datum _sortIndex
      {
         value = "16";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=D:\\Q_DE_NANO}";
         type = "String";
      }
   }
   element epcs.epcs_control_port
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "0";
         type = "long";
      }
   }
   element g_sensor_int
   {
      datum _sortIndex
      {
         value = "11";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element gsensor_spi
   {
      datum _sortIndex
      {
         value = "17";
         type = "int";
      }
   }
   element i2c_scl
   {
      datum _sortIndex
      {
         value = "15";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element i2c_sda
   {
      datum _sortIndex
      {
         value = "14";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element cpu.jtag_debug_module
   {
      datum baseAddress
      {
         value = "100665344";
         type = "long";
      }
   }
   element jtag_uart
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
   }
   element key
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element led
   {
      datum _sortIndex
      {
         value = "10";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element altpll_sys.pll_slave
   {
      datum baseAddress
      {
         value = "100667392";
         type = "long";
      }
   }
   element i2c_sda.s1
   {
      datum baseAddress
      {
         value = "2112";
         type = "long";
      }
   }
   element clock_crossing_io.s1
   {
      datum baseAddress
      {
         value = "67108864";
         type = "long";
      }
   }
   element g_sensor_int.s1
   {
      datum baseAddress
      {
         value = "80";
         type = "long";
      }
   }
   element select_i2c_clk.s1
   {
      datum baseAddress
      {
         value = "96";
         type = "long";
      }
   }
   element i2c_scl.s1
   {
      datum baseAddress
      {
         value = "2128";
         type = "long";
      }
   }
   element led.s1
   {
      datum baseAddress
      {
         value = "48";
         type = "long";
      }
   }
   element sdram.s1
   {
      datum _lockedAddress
      {
         value = "0";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "33554432";
         type = "long";
      }
   }
   element timer.s1
   {
      datum baseAddress
      {
         value = "0";
         type = "long";
      }
   }
   element sw.s1
   {
      datum baseAddress
      {
         value = "64";
         type = "long";
      }
   }
   element clock_crossing_io2.s1
   {
      datum baseAddress
      {
         value = "83886080";
         type = "long";
      }
   }
   element key.s1
   {
      datum baseAddress
      {
         value = "32";
         type = "long";
      }
   }
   element sdram
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=D:\\DE_NANO\\Q_DE_NANO_RTL}";
         type = "String";
      }
   }
   element select_i2c_clk
   {
      datum _sortIndex
      {
         value = "12";
         type = "int";
      }
   }
   element gsensor_spi.slave
   {
      datum baseAddress
      {
         value = "2048";
         type = "long";
      }
   }
   element adc_spi_read.slave
   {
      datum baseAddress
      {
         value = "100667416";
         type = "long";
      }
   }
   element sw
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element sysid
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element timer
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
}
]]></parameter>
 <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
 <parameter name="deviceFamily" value="CYCLONEIVE" />
 <parameter name="fabricMode" value="SOPC" />
 <parameter name="generateLegacySim" value="false" />
 <parameter name="generationId" value="0" />
 <parameter name="globalResetBus" value="true" />
 <parameter name="hdlLanguage" value="VERILOG" />
 <parameter name="maxAdditionalLatency" value="0" />
 <parameter name="projectName" value="DE0_Nano.qpf" />
 <parameter name="sopcBorderPoints" value="true" />
 <parameter name="systemHash" value="45392022796" />
 <parameter name="timeStamp" value="1298277150484" />
 <module kind="clock_source" version="10.1" enabled="1" name="clk_50">
  <parameter name="clockFrequency" value="50000000" />
  <parameter name="clockFrequencyKnown" value="true" />
  <parameter name="inputClockFrequency" value="0" />
  <parameter name="resetSynchronousEdges" value="NONE" />
 </module>
 <module kind="altera_nios2" version="10.1" enabled="1" name="cpu">
  <parameter name="userDefinedSettings" value="" />
  <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
  <parameter name="setting_showUnpublishedSettings" value="false" />
  <parameter name="setting_showInternalSettings" value="false" />
  <parameter name="setting_shadowRegisterSets" value="0" />
  <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
  <parameter name="setting_preciseIllegalMemAccessException" value="false" />
  <parameter name="setting_preciseDivisionErrorException" value="false" />
  <parameter name="setting_performanceCounter" value="false" />
  <parameter name="setting_perfCounterWidth" value="_32" />
  <parameter name="setting_interruptControllerType" value="Internal" />
  <parameter name="setting_illegalMemAccessDetection" value="false" />
  <parameter name="setting_illegalInstructionsTrap" value="false" />
  <parameter name="setting_fullWaveformSignals" value="false" />
  <parameter name="setting_extraExceptionInfo" value="false" />
  <parameter name="setting_exportPCB" value="false" />
  <parameter name="setting_debugSimGen" value="false" />
  <parameter name="setting_clearXBitsLDNonBypass" value="true" />
  <parameter name="setting_branchPredictionType" value="Automatic" />
  <parameter name="setting_bit31BypassDCache" value="true" />
  <parameter name="setting_bigEndian" value="false" />
  <parameter name="setting_bhtPtrSz" value="_8" />
  <parameter name="setting_bhtIndexPcOnly" value="false" />
  <parameter name="setting_avalonDebugPortPresent" value="false" />
  <parameter name="setting_alwaysEncrypt" value="true" />
  <parameter name="setting_allowFullAddressRange" value="false" />
  <parameter name="setting_activateTrace" value="true" />
  <parameter name="setting_activateTestEndChecker" value="false" />
  <parameter name="setting_activateMonitors" value="true" />
  <parameter name="setting_activateModelChecker" value="false" />
  <parameter name="setting_HDLSimCachesCleared" value="true" />
  <parameter name="setting_HBreakTest" value="false" />
  <parameter name="resetSlave" value="sdram.s1" />
  <parameter name="resetOffset" value="0" />
  <parameter name="muldiv_multiplierType" value="EmbeddedMulFast" />
  <parameter name="muldiv_divider" value="false" />
  <parameter name="mpu_useLimit" value="false" />
  <parameter name="mpu_numOfInstRegion" value="8" />
  <parameter name="mpu_numOfDataRegion" value="8" />
  <parameter name="mpu_minInstRegionSize" value="_12" />
  <parameter name="mpu_minDataRegionSize" value="_12" />
  <parameter name="mpu_enabled" value="false" />
  <parameter name="mmu_uitlbNumEntries" value="_4" />
  <parameter name="mmu_udtlbNumEntries" value="_6" />
  <parameter name="mmu_tlbPtrSz" value="_7" />
  <parameter name="mmu_tlbNumWays" value="_16" />
  <parameter name="mmu_processIDNumBits" value="_8" />
  <parameter name="mmu_enabled" value="false" />
  <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
  <parameter name="mmu_TLBMissExcSlave" value="" />
  <parameter name="mmu_TLBMissExcOffset" value="0" />
  <parameter name="manuallyAssignCpuID" value="false" />
  <parameter name="internalIrqMaskSystemInfo" value="63" />
  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='sdram.s1' start='0x2000000' end='0x4000000' /><slave name='cpu.jtag_debug_module' start='0x6000800' end='0x6001000' /></address-map>]]></parameter>
  <parameter name="instAddrWidth" value="27" />
  <parameter name="impl" value="Fast" />
  <parameter name="icache_size" value="_1024" />
  <parameter name="icache_ramBlockType" value="Automatic" />
  <parameter name="icache_numTCIM" value="_0" />
  <parameter name="icache_burstType" value="None" />
  <parameter name="exceptionSlave" value="sdram.s1" />
  <parameter name="exceptionOffset" value="32" />
  <parameter name="deviceFeaturesSystemInfo">M512_MEMORY 0 M4K_MEMORY 0 M9K_MEMORY 1 M20K_MEMORY 0 M144K_MEMORY 0 MRAM_MEMORY 0 MLAB_MEMORY 0 ESB 0 EPCS 1 DSP 0 EMUL 1 HARDCOPY 0 LVDS_IO 1 ADDRESS_STALL 1 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 DSP_SHIFTER_BLOCK 0</parameter>
  <parameter name="deviceFamilyName" value="Cyclone IV E" />
  <parameter name="debug_triggerArming" value="true" />
  <parameter name="debug_level" value="Level1" />
  <parameter name="debug_jtagInstanceID" value="0" />
  <parameter name="debug_embeddedPLL" value="true" />
  <parameter name="debug_debugReqSignals" value="false" />
  <parameter name="debug_assignJtagInstanceID" value="false" />
  <parameter name="debug_OCIOnchipTrace" value="_128" />
  <parameter name="dcache_size" value="_512" />
  <parameter name="dcache_ramBlockType" value="Automatic" />
  <parameter name="dcache_omitDataMaster" value="false" />
  <parameter name="dcache_numTCDM" value="_0" />
  <parameter name="dcache_lineSize" value="_32" />
  <parameter name="dcache_bursts" value="false" />
  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='sdram.s1' start='0x2000000' end='0x4000000' /><slave name='timer.s1' start='0x4000000' end='0x4000020' /><slave name='key.s1' start='0x4000020' end='0x4000030' /><slave name='led.s1' start='0x4000030' end='0x4000040' /><slave name='sw.s1' start='0x4000040' end='0x4000050' /><slave name='g_sensor_int.s1' start='0x4000050' end='0x4000060' /><slave name='select_i2c_clk.s1' start='0x4000060' end='0x4000070' /><slave name='sysid.control_slave' start='0x4000070' end='0x4000078' /><slave name='epcs.epcs_control_port' start='0x5000000' end='0x5000800' /><slave name='gsensor_spi.slave' start='0x5000800' end='0x5000840' /><slave name='i2c_sda.s1' start='0x5000840' end='0x5000850' /><slave name='i2c_scl.s1' start='0x5000850' end='0x5000860' /><slave name='cpu.jtag_debug_module' start='0x6000800' end='0x6001000' /><slave name='altpll_sys.pll_slave' start='0x6001000' end='0x6001010' /><slave name='jtag_uart.avalon_jtag_slave' start='0x6001010' end='0x6001018' /><slave name='adc_spi_read.slave' start='0x6001018' end='0x600101C' /></address-map>]]></parameter>
  <parameter name="dataAddrWidth" value="27" />
  <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
  <parameter name="cpuReset" value="false" />
  <parameter name="cpuID" value="0" />
  <parameter name="clockFrequency" value="100000000" />
  <parameter name="breakSlave">cpu.jtag_debug_module</parameter>
  <parameter name="breakOffset" value="32" />
 </module>
 <module kind="altera_avalon_sysid" version="10.1" enabled="1" name="sysid">
  <parameter name="id" value="0" />
 </module>
 <module kind="altera_avalon_timer" version="10.1" enabled="1" name="timer">
  <parameter name="alwaysRun" value="false" />
  <parameter name="counterSize" value="32" />
  <parameter name="fixedPeriod" value="false" />
  <parameter name="period" value="1" />
  <parameter name="periodUnits" value="MSEC" />
  <parameter name="resetOutput" value="false" />
  <parameter name="snapshot" value="true" />
  <parameter name="systemFrequency" value="10000000" />
  <parameter name="timeoutPulseOutput" value="false" />
  <parameter name="timerPreset" value="CUSTOM" />
 </module>
 <module kind="altera_avalon_pio" version="10.1" enabled="1" name="key">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="10000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="2" />
 </module>
 <module kind="altera_avalon_pio" version="10.1" enabled="1" name="sw">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="10000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="ANY" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="4" />
 </module>
 <module kind="altera_avalon_pio" version="10.1" enabled="1" name="led">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="10000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="8" />
 </module>
 <module kind="altera_avalon_pio" version="10.1" enabled="1" name="i2c_scl">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="1" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="10.1" enabled="1" name="i2c_sda">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Bidir" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="1" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module
   kind="altera_avalon_new_sdram_controller"
   version="10.1"
   enabled="1"
   name="sdram">
  <parameter name="TAC" value="5.5" />
  <parameter name="TMRD" value="3" />
  <parameter name="TRCD" value="20.0" />
  <parameter name="TRFC" value="70.0" />
  <parameter name="TRP" value="20.0" />
  <parameter name="TWR" value="14.0" />
  <parameter name="casLatency" value="3" />
  <parameter name="clockRate" value="100000000" />
  <parameter name="columnWidth" value="9" />
  <parameter name="dataWidth" value="16" />
  <parameter name="generateSimulationModel" value="true" />
  <parameter name="initNOPDelay" value="0.0" />
  <parameter name="initRefreshCommands" value="2" />
  <parameter name="masteredTristateBridgeSlave" value="" />
  <parameter name="model" value="custom" />
  <parameter name="numberOfBanks" value="4" />
  <parameter name="numberOfChipSelects" value="1" />
  <parameter name="pinsSharedViaTriState" value="false" />
  <parameter name="powerUpDelay" value="100.0" />
  <parameter name="refreshPeriod" value="15.625" />
  <parameter name="registerDataIn" value="true" />
  <parameter name="rowWidth" value="13" />
 </module>
 <module kind="altpll" version="10.1" enabled="1" name="altpll_sys">
  <parameter name="HIDDEN_CUSTOM_ELABORATION">altpll_avalon_elaboration</parameter>
  <parameter name="HIDDEN_CUSTOM_POST_EDIT">altpll_avalon_post_edit</parameter>
  <parameter name="INTENDED_DEVICE_FAMILY" value="Cyclone IV E" />
  <parameter name="WIDTH_CLOCK" value="5" />
  <parameter name="WIDTH_PHASECOUNTERSELECT" value="" />
  <parameter name="PRIMARY_CLOCK" value="" />
  <parameter name="INCLK0_INPUT_FREQUENCY" value="20000" />
  <parameter name="INCLK1_INPUT_FREQUENCY" value="" />
  <parameter name="OPERATION_MODE" value="NORMAL" />
  <parameter name="PLL_TYPE" value="AUTO" />
  <parameter name="QUALIFY_CONF_DONE" value="" />
  <parameter name="COMPENSATE_CLOCK" value="CLK0" />
  <parameter name="SCAN_CHAIN" value="" />
  <parameter name="GATE_LOCK_SIGNAL" value="" />
  <parameter name="GATE_LOCK_COUNTER" value="" />
  <parameter name="LOCK_HIGH" value="" />
  <parameter name="LOCK_LOW" value="" />
  <parameter name="VALID_LOCK_MULTIPLIER" value="" />
  <parameter name="INVALID_LOCK_MULTIPLIER" value="" />
  <parameter name="SWITCH_OVER_ON_LOSSCLK" value="" />
  <parameter name="SWITCH_OVER_ON_GATED_LOCK" value="" />
  <parameter name="ENABLE_SWITCH_OVER_COUNTER" value="" />
  <parameter name="SKIP_VCO" value="" />
  <parameter name="SWITCH_OVER_COUNTER" value="" />
  <parameter name="SWITCH_OVER_TYPE" value="" />
  <parameter name="FEEDBACK_SOURCE" value="" />
  <parameter name="BANDWIDTH" value="" />
  <parameter name="BANDWIDTH_TYPE" value="AUTO" />
  <parameter name="SPREAD_FREQUENCY" value="" />
  <parameter name="DOWN_SPREAD" value="" />
  <parameter name="SELF_RESET_ON_GATED_LOSS_LOCK" value="" />
  <parameter name="SELF_RESET_ON_LOSS_LOCK" value="" />
  <parameter name="CLK0_MULTIPLY_BY" value="2" />
  <parameter name="CLK1_MULTIPLY_BY" value="2" />
  <parameter name="CLK2_MULTIPLY_BY" value="1" />
  <parameter name="CLK3_MULTIPLY_BY" value="4" />
  <parameter name="CLK4_MULTIPLY_BY" value="1" />
  <parameter name="CLK5_MULTIPLY_BY" value="" />
  <parameter name="CLK6_MULTIPLY_BY" value="" />
  <parameter name="CLK7_MULTIPLY_BY" value="" />
  <parameter name="CLK8_MULTIPLY_BY" value="" />
  <parameter name="CLK9_MULTIPLY_BY" value="" />
  <parameter name="EXTCLK0_MULTIPLY_BY" value="" />
  <parameter name="EXTCLK1_MULTIPLY_BY" value="" />
  <parameter name="EXTCLK2_MULTIPLY_BY" value="" />
  <parameter name="EXTCLK3_MULTIPLY_BY" value="" />
  <parameter name="CLK0_DIVIDE_BY" value="1" />
  <parameter name="CLK1_DIVIDE_BY" value="1" />
  <parameter name="CLK2_DIVIDE_BY" value="5" />
  <parameter name="CLK3_DIVIDE_BY" value="5" />
  <parameter name="CLK4_DIVIDE_BY" value="25" />
  <parameter name="CLK5_DIVIDE_BY" value="" />
  <parameter name="CLK6_DIVIDE_BY" value="" />
  <parameter name="CLK7_DIVIDE_BY" value="" />
  <parameter name="CLK8_DIVIDE_BY" value="" />
  <parameter name="CLK9_DIVIDE_BY" value="" />
  <parameter name="EXTCLK0_DIVIDE_BY" value="" />
  <parameter name="EXTCLK1_DIVIDE_BY" value="" />
  <parameter name="EXTCLK2_DIVIDE_BY" value="" />
  <parameter name="EXTCLK3_DIVIDE_BY" value="" />
  <parameter name="CLK0_PHASE_SHIFT" value="0" />
  <parameter name="CLK1_PHASE_SHIFT" value="-1667" />
  <parameter name="CLK2_PHASE_SHIFT" value="0" />
  <parameter name="CLK3_PHASE_SHIFT" value="0" />
  <parameter name="CLK4_PHASE_SHIFT" value="0" />
  <parameter name="CLK5_PHASE_SHIFT" value="" />
  <parameter name="CLK6_PHASE_SHIFT" value="" />
  <parameter name="CLK7_PHASE_SHIFT" value="" />
  <parameter name="CLK8_PHASE_SHIFT" value="" />
  <parameter name="CLK9_PHASE_SHIFT" value="" />
  <parameter name="EXTCLK0_PHASE_SHIFT" value="" />
  <parameter name="EXTCLK1_PHASE_SHIFT" value="" />
  <parameter name="EXTCLK2_PHASE_SHIFT" value="" />
  <parameter name="EXTCLK3_PHASE_SHIFT" value="" />
  <parameter name="CLK0_DUTY_CYCLE" value="50" />
  <parameter name="CLK1_DUTY_CYCLE" value="50" />
  <parameter name="CLK2_DUTY_CYCLE" value="50" />
  <parameter name="CLK3_DUTY_CYCLE" value="50" />
  <parameter name="CLK4_DUTY_CYCLE" value="50" />
  <parameter name="CLK5_DUTY_CYCLE" value="" />
  <parameter name="CLK6_DUTY_CYCLE" value="" />
  <parameter name="CLK7_DUTY_CYCLE" value="" />
  <parameter name="CLK8_DUTY_CYCLE" value="" />
  <parameter name="CLK9_DUTY_CYCLE" value="" />
  <parameter name="EXTCLK0_DUTY_CYCLE" value="" />
  <parameter name="EXTCLK1_DUTY_CYCLE" value="" />
  <parameter name="EXTCLK2_DUTY_CYCLE" value="" />
  <parameter name="EXTCLK3_DUTY_CYCLE" value="" />
  <parameter name="PORT_clkena0" value="PORT_UNUSED" />
  <parameter name="PORT_clkena1" value="PORT_UNUSED" />
  <parameter name="PORT_clkena2" value="PORT_UNUSED" />
  <parameter name="PORT_clkena3" value="PORT_UNUSED" />
  <parameter name="PORT_clkena4" value="PORT_UNUSED" />
  <parameter name="PORT_clkena5" value="PORT_UNUSED" />
  <parameter name="PORT_extclkena0" value="" />
  <parameter name="PORT_extclkena1" value="" />
  <parameter name="PORT_extclkena2" value="" />
  <parameter name="PORT_extclkena3" value="" />
  <parameter name="PORT_extclk0" value="PORT_UNUSED" />
  <parameter name="PORT_extclk1" value="PORT_UNUSED" />
  <parameter name="PORT_extclk2" value="PORT_UNUSED" />
  <parameter name="PORT_extclk3" value="PORT_UNUSED" />
  <parameter name="PORT_CLKBAD0" value="PORT_UNUSED" />
  <parameter name="PORT_CLKBAD1" value="PORT_UNUSED" />
  <parameter name="PORT_clk0" value="PORT_USED" />
  <parameter name="PORT_clk1" value="PORT_USED" />
  <parameter name="PORT_clk2" value="PORT_USED" />
  <parameter name="PORT_clk3" value="PORT_USED" />
  <parameter name="PORT_clk4" value="PORT_USED" />
  <parameter name="PORT_clk5" value="PORT_UNUSED" />
  <parameter name="PORT_clk6" value="" />
  <parameter name="PORT_clk7" value="" />
  <parameter name="PORT_clk8" value="" />
  <parameter name="PORT_clk9" value="" />
  <parameter name="PORT_SCANDATA" value="PORT_UNUSED" />
  <parameter name="PORT_SCANDATAOUT" value="PORT_UNUSED" />
  <parameter name="PORT_SCANDONE" value="PORT_UNUSED" />
  <parameter name="PORT_SCLKOUT1" value="" />
  <parameter name="PORT_SCLKOUT0" value="" />
  <parameter name="PORT_ACTIVECLOCK" value="PORT_UNUSED" />
  <parameter name="PORT_CLKLOSS" value="PORT_UNUSED" />
  <parameter name="PORT_INCLK1" value="PORT_UNUSED" />
  <parameter name="PORT_INCLK0" value="PORT_USED" />
  <parameter name="PORT_FBIN" value="PORT_UNUSED" />
  <parameter name="PORT_PLLENA" value="PORT_UNUSED" />
  <parameter name="PORT_CLKSWITCH" value="PORT_UNUSED" />
  <parameter name="PORT_ARESET" value="PORT_USED" />
  <parameter name="PORT_PFDENA" value="PORT_UNUSED" />
  <parameter name="PORT_SCANCLK" value="PORT_UNUSED" />
  <parameter name="PORT_SCANACLR" value="PORT_UNUSED" />
  <parameter name="PORT_SCANREAD" value="PORT_UNUSED" />
  <parameter name="PORT_SCANWRITE" value="PORT_UNUSED" />
  <parameter name="PORT_ENABLE0" value="" />
  <parameter name="PORT_ENABLE1" value="" />
  <parameter name="PORT_LOCKED" value="PORT_USED" />
  <parameter name="PORT_CONFIGUPDATE" value="PORT_UNUSED" />
  <parameter name="PORT_FBOUT" value="" />
  <parameter name="PORT_PHASEDONE" value="PORT_UNUSED" />
  <parameter name="PORT_PHASESTEP" value="PORT_UNUSED" />
  <parameter name="PORT_PHASEUPDOWN" value="PORT_UNUSED" />
  <parameter name="PORT_SCANCLKENA" value="PORT_UNUSED" />
  <parameter name="PORT_PHASECOUNTERSELECT" value="PORT_UNUSED" />
  <parameter name="PORT_VCOOVERRANGE" value="" />
  <parameter name="PORT_VCOUNDERRANGE" value="" />
  <parameter name="DPA_MULTIPLY_BY" value="" />
  <parameter name="DPA_DIVIDE_BY" value="" />
  <parameter name="DPA_DIVIDER" value="" />
  <parameter name="VCO_MULTIPLY_BY" value="" />
  <parameter name="VCO_DIVIDE_BY" value="" />
  <parameter name="SCLKOUT0_PHASE_SHIFT" value="" />
  <parameter name="SCLKOUT1_PHASE_SHIFT" value="" />
  <parameter name="VCO_FREQUENCY_CONTROL" value="" />
  <parameter name="VCO_PHASE_SHIFT_STEP" value="" />
  <parameter name="USING_FBMIMICBIDIR_PORT" value="" />
  <parameter name="SCAN_CHAIN_MIF_FILE" value="" />
  <parameter name="AVALON_USE_SEPARATE_SYSCLK" value="NO" />
  <parameter name="HIDDEN_CONSTANTS">CT#CLK2_DIVIDE_BY 5 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 5 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 25 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 1 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT -1667 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 1 CT#INTENDED_DEVICE_FAMILY {Cyclone IV E} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 4 CT#PORT_LOCKED PORT_USED</parameter>
  <parameter name="HIDDEN_PRIVATES">PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 1 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 2.00000000 PT#OUTPUT_FREQ3 40.00000000 PT#OUTPUT_FREQ2 10.00000000 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 6 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 1 PT#DIV_FACTOR2 1 PT#PHASE_SHIFT1 -60.00000000 PT#DIV_FACTOR1 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 2.000000 PT#EFF_OUTPUT_FREQ_VALUE3 40.000000 PT#EFF_OUTPUT_FREQ_VALUE2 10.000000 PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#MIRROR_CLK0 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#CLKLOSS_CHECK 0 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {Cyclone IV E} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1290674183995785.mif PT#ACTIVECLK_CHECK 0</parameter>
  <parameter name="HIDDEN_USED_PORTS">UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used</parameter>
  <parameter name="HIDDEN_IS_NUMERIC">IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#CLK2_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1</parameter>
  <parameter name="HIDDEN_MF_PORTS">MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1</parameter>
  <parameter name="HIDDEN_IF_PORTS">IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#readdata {output 32} IF#write {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#c2 {output 0} IF#address {input 2} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0}</parameter>
  <parameter name="HIDDEN_IS_FIRST_EDIT" value="0" />
  <parameter name="AUTO_INCLK_INTERFACE_CLOCK_RATE" value="50000000" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
 </module>
 <module
   kind="altera_avalon_clock_crossing"
   version="10.1"
   enabled="1"
   name="clock_crossing_io">
  <parameter name="dataWidth" value="32" />
  <parameter name="downstreamFIFODepth" value="16" />
  <parameter name="downstreamUseRegister" value="false" />
  <parameter name="masterSyncDepth" value="3" />
  <parameter name="maxBurstSize" value="8" />
  <parameter name="slaveSyncDepth" value="3" />
  <parameter name="upstreamFIFODepth" value="32" />
  <parameter name="upstreamUseRegister" value="false" />
  <parameter name="useBurstCount" value="false" />
 </module>
 <module
   kind="altera_avalon_pio"
   version="10.1"
   enabled="1"
   name="g_sensor_int">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="10000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module
   kind="altera_avalon_epcs_flash_controller"
   version="10.1"
   enabled="1"
   name="epcs">
  <parameter name="autoSelectASMIAtom" value="true" />
  <parameter name="deviceFamilyString" value="Cyclone IV E" />
  <parameter name="useASMIAtom" value="false" />
 </module>
 <module
   kind="altera_avalon_clock_crossing"
   version="10.1"
   enabled="1"
   name="clock_crossing_io2">
  <parameter name="dataWidth" value="32" />
  <parameter name="downstreamFIFODepth" value="16" />
  <parameter name="downstreamUseRegister" value="false" />
  <parameter name="masterSyncDepth" value="3" />
  <parameter name="maxBurstSize" value="8" />
  <parameter name="slaveSyncDepth" value="3" />
  <parameter name="upstreamFIFODepth" value="64" />
  <parameter name="upstreamUseRegister" value="false" />
  <parameter name="useBurstCount" value="false" />
 </module>
 <module
   kind="altera_avalon_jtag_uart"
   version="10.1"
   enabled="1"
   name="jtag_uart">
  <parameter name="allowMultipleConnections" value="false" />
  <parameter name="hubInstanceID" value="0" />
  <parameter name="readBufferDepth" value="64" />
  <parameter name="readIRQThreshold" value="8" />
  <parameter name="simInputCharacterStream" value="" />
  <parameter name="simInteractiveOptions">INTERACTIVE_ASCII_OUTPUT</parameter>
  <parameter name="useRegistersForReadBuffer" value="false" />
  <parameter name="useRegistersForWriteBuffer" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
  <parameter name="writeBufferDepth" value="64" />
  <parameter name="writeIRQThreshold" value="8" />
 </module>
 <module kind="TERASIC_ADC_READ" version="1.0" enabled="1" name="adc_spi_read">
  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="2000000" />
 </module>
 <module kind="TERASIC_SPI_3WIRE" version="1.0" enabled="1" name="gsensor_spi">
  <parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="50000000" />
 </module>
 <module
   kind="altera_avalon_pio"
   version="10.1"
   enabled="1"
   name="select_i2c_clk">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="10000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.instruction_master"
   end="cpu.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x06000800" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.data_master"
   end="cpu.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x06000800" />
 </connection>
 <connection kind="interrupt" version="10.1" start="cpu.d_irq" end="timer.irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection kind="interrupt" version="10.1" start="cpu.d_irq" end="key.irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection kind="interrupt" version="10.1" start="cpu.d_irq" end="sw.irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection
   kind="clock"
   version="10.1"
   start="clk_50.clk"
   end="altpll_sys.inclk_interface" />
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.data_master"
   end="altpll_sys.pll_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x06001000" />
 </connection>
 <connection kind="clock" version="10.1" start="altpll_sys.c0" end="cpu.clk" />
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.data_master"
   end="clock_crossing_io.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x04000000" />
 </connection>
 <connection
   kind="clock"
   version="10.1"
   start="altpll_sys.c0"
   end="clock_crossing_io.clk_s1" />
 <connection
   kind="clock"
   version="10.1"
   start="altpll_sys.c2"
   end="clock_crossing_io.clk_m1" />
 <connection kind="clock" version="10.1" start="altpll_sys.c2" end="sysid.clk" />
 <connection kind="clock" version="10.1" start="altpll_sys.c2" end="timer.clk" />
 <connection kind="clock" version="10.1" start="altpll_sys.c2" end="key.clk" />
 <connection kind="clock" version="10.1" start="altpll_sys.c2" end="sw.clk" />
 <connection kind="clock" version="10.1" start="altpll_sys.c2" end="led.clk" />
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io.m1"
   end="timer.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io.m1"
   end="sysid.control_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0070" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io.m1"
   end="key.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0020" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io.m1"
   end="led.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0030" />
 </connection>
 <connection kind="avalon" version="10.1" start="clock_crossing_io.m1" end="sw.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0040" />
 </connection>
 <connection
   kind="interrupt"
   version="10.1"
   start="cpu.d_irq"
   end="g_sensor_int.irq">
  <parameter name="irqNumber" value="3" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io.m1"
   end="g_sensor_int.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0050" />
 </connection>
 <connection kind="avalon" version="10.1" start="cpu.data_master" end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x02000000" />
 </connection>
 <connection kind="clock" version="10.1" start="altpll_sys.c0" end="sdram.clk" />
 <connection kind="interrupt" version="10.1" start="cpu.d_irq" end="epcs.irq">
  <parameter name="irqNumber" value="4" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.data_master"
   end="clock_crossing_io2.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x05000000" />
 </connection>
 <connection
   kind="clock"
   version="10.1"
   start="clk_50.clk"
   end="clock_crossing_io2.clk_m1" />
 <connection
   kind="clock"
   version="10.1"
   start="altpll_sys.c0"
   end="clock_crossing_io2.clk_s1" />
 <connection
   kind="clock"
   version="10.1"
   start="altpll_sys.c2"
   end="g_sensor_int.clk" />
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.data_master"
   end="jtag_uart.avalon_jtag_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x06001010" />
 </connection>
 <connection kind="interrupt" version="10.1" start="cpu.d_irq" end="jtag_uart.irq">
  <parameter name="irqNumber" value="5" />
 </connection>
 <connection kind="clock" version="10.1" start="altpll_sys.c0" end="jtag_uart.clk" />
 <connection kind="clock" version="10.1" start="clk_50.clk" end="epcs.clk" />
 <connection kind="clock" version="10.1" start="clk_50.clk" end="i2c_scl.clk" />
 <connection kind="clock" version="10.1" start="clk_50.clk" end="i2c_sda.clk" />
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.data_master"
   end="adc_spi_read.slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x06001018" />
 </connection>
 <connection
   kind="clock"
   version="10.1"
   start="altpll_sys.c4"
   end="adc_spi_read.clock" />
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io2.m1"
   end="i2c_sda.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0840" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io2.m1"
   end="i2c_scl.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0850" />
 </connection>
 <connection
   kind="clock"
   version="10.1"
   start="clk_50.clk"
   end="gsensor_spi.clock_reset" />
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io2.m1"
   end="epcs.epcs_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="cpu.instruction_master"
   end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x02000000" />
 </connection>
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io2.m1"
   end="gsensor_spi.slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0800" />
 </connection>
 <connection
   kind="clock"
   version="10.1"
   start="altpll_sys.c2"
   end="select_i2c_clk.clk" />
 <connection
   kind="avalon"
   version="10.1"
   start="clock_crossing_io.m1"
   end="select_i2c_clk.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0060" />
 </connection>
</system>
