# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2010 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 10.1 Build 153 11/29/2010 SJ Full Version
# Date created = 15:26:39  January 13, 2011
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		myfirst_niosii_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE22F17C6
set_global_assignment -name TOP_LEVEL_ENTITY myfirst_niosii
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 10.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:26:39  JANUARY 13, 2011"
set_global_assignment -name LAST_QUARTUS_VERSION 10.1
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
set_global_assignment -name QIP_FILE DE_NANO_SOPC.qip
set_global_assignment -name VERILOG_FILE myfirst_niosii.v
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name MISC_FILE "D:/myfirst_niosii/myfirst_niosii.dpf"
set_location_assignment PIN_R8 -to CLOCK_50
set_location_assignment PIN_L3 -to LED[7]
set_location_assignment PIN_B1 -to LED[6]
set_location_assignment PIN_F3 -to LED[5]
set_location_assignment PIN_D1 -to LED[4]
set_location_assignment PIN_A11 -to LED[3]
set_location_assignment PIN_B13 -to LED[2]
set_location_assignment PIN_A13 -to LED[1]
set_location_assignment PIN_A15 -to LED[0]
set_global_assignment -name QIP_FILE DE0_NANO_SOPC.qip
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top